AMD Phenom II X6 1100T Processor
Andy Ruffell / 14 years ago
Specifications
To keep up with their competitors, or should we just say “Intel” they have slightly increased the base speed to 3.3GHz and with a turbo speed of 3.7GHz it puts this processor in line with some of the other CPU’s in AMD’s range.
Being a Phenom II, it incorporates that L3 cache that we all know and love, giving us a total of 6MB shared L3 cache.
Core wise, it’s still based on the Thuban core, and has a TDP of 125watts, so make sure you have a good cooler ready if you plan on overclocking. All of this technology is nicely bundled up on a 45nm process ready for the 938 pin AM3 socket.
| Model Number & Core Frequency: | X6 1100T / 3.7GHz (Turbo) / 3.3GHz (Base) |
| OPN: | HDE00ZFBK6DGR |
| L1 Cache Sizes: | 64K of L1 instruction and 64K of L1 data cache per core (768KB total L1 per processor) |
| L2 Cache Sizes: | 512KB of L2 data cache per core (3MB total L2 per processor) |
| L3 Cache Sizes: | 6MB (shared) |
| Total Cache (L2+L3): | 9MB |
| Memory Controller Type: | Integrated 128-bit wide memory controller * |
| Memory Controller Speed: | Up to 2.0GHz with Dual Dynamic Power Management |
| Types of Memory Supported: | Unregistered DIMMs up to PC2-8500 (DDR2-1066MHz) -AND- PC3-10600 (DDR3-1333MHz) |
| HyperTransport 3.0 Specification: | One 16-bit/16-bit link @ up to 4.0GHz full duplex (2.0GHz x2) |
| Total Processor-to-System Bandwidth: | Up to 37.3GB/s total bandwidth [Up to 21.3 GB/s memory bandwidth (DDR3-1333) + 16.0GB/s (HT3)] Up to 33.1GB/s total bandwidth [Up to 17.1 GB/s memory bandwidth (DDR2-1066) + 16.0GB/s (HT3)] |
| Packaging: | Socket AM3 938-pin organic micro pin grid array (micro-PGA) |
| Fab location: | GLOBALFOUNDARIES Fab 1 module 1 in Dresden, Germany (formerly AMD Fab 36) |
| Process Technology: | 45-nanometer DSL SOI (silicon-on-insulator) technology |
| Approximate Die Size: | 346mm2 |
| Approximate Transistor count: | Similar to Istanbul’s ~904 million |
| Max TDP: | 125 Watts |
| AMD Codename: | “Thuban” |
*Note: configurable for dual 64-bit channels for simultaneous read/writes
