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AMD’s Carrizo APUs Based on 28nm, Have Stacked DRAM On-Package

New information has emerged about AMD’s next generation desktop “Carrizo” APUs. We already know so far that Carrizo will be arriving in 2015, it will make use of AMD’s Excavator CPU core architecture, use DDR3 memory, have full HSA support, fit the FM2+ package and work with existing A88X motherboards. The new information suggests AMD’s Carrizo APUs will make use of 28nm APU architecture, that’s covering the CPU and GPU components, but also they will make use of 20nm stacked DRAM.

Why stacked DRAM on-package? Well it certainly does make sense for AMD, even if this information is still in its “rumour” stages. AMD’s APUs are currently bottlenecked by the system memory which is intensively used by the GPU component. Making the move to DDR4 would be expensive so instead stacked DRAM allows DDR3 to be used, but offer better performance than DDR4 because of the shortened and simplified interface pipeline. Stacked DRAM on Carrizo would offer a cost effective way of interfacing with the system memory at higher speeds and lower latencies than DDR4, but also at a lower cost than integrated on-die L3 cache. It would also enable AMD to offer a minimum amount and standard of memory for its HSA concept making it a lot more developer friendly. The stacked DRAM feature is rumoured to be reserved for business-grade and high-end consumer products only: this won’t be equipped on entry-level Carrizo products.

Source: Bits n Chips, Via: WCCFTech

Image courtesy of ProHardveri

Ryan Martin

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