With every new processor launch, the big focus is invariably on IPC. As a result, IPC becomes the focus for determining performance gains. However, other than pure IPC improvements, there are other ways for performance to increase. One of these is the adoption of new instruction sets. For the latest Cannon Lake architecture, Intel is sparing no expense of the chips. The new design now includes the new AVX-512 instructions.
AVX-512 has been sitting in the wings for a long time. It is an extension of AVX 2 which was itself a part of AVX. These are 512bit extensions to the SIMD instructions. AVX arrived with Sandy Bridge while AVX 2 came with Haswell. Intel originally planned for the AVX-512 arrival with Skylake. Due to a variety of factors, the introduction was limited to just enterprise Skylake, with consumer adoption postponed. AVX-512 is important as it can double performance and efficiency in the right circumstances.
Given that this mobile Core i3 has AVX-512, it is clear that Cannon Lake as a whole should have support. There is little reason for desktop Cannon Lake to lose this feature. Since it appeared on the Intel Ark page, we will keep a close eye on future Cannon Lake processors. This should provide a leg up for Intel as Ryzen currently lacks AVX-512. However, AMD may add the instruction set in with Ryzen 2 next year.
Once AVX-512 hits the mainstream, we will likely see wider adoption in the software community. As always, the instruction sets hardware tends to lead the software side of things, at least for consumers. This will hopefully unlock more performance for the more demanding types of computing. Given the issues with 10nm Cannon Lake, it is unclear when the chips will arrive. However, we should see them by the end of 2018 or early 2019 so look forward to that.
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