Intel Cyclone 10 FPGA Family Launched
Ron Perillo / 8 years ago
Aside from recently launching their highest performing and most expensive Xeon E7-8894 v4processor, Intel is also delving deeper into IoT with the launch of their Cyclone 10 FPGA line. The launch stems directly from their acquisition of Altera in 2015 and offers a lower power, cost-sensitive option to the rest of their previously existing product line. The new Cyclone 10 processors will be available in two variants Cyclone 10 GX and Cyclone 10 LP, each designed for different areas of application.
The Intel Cyclone 10 GX, which uses TSMC’s 20nm process, is targeting markets that require high I/O performance and core speed; applications which include industrial, military, automotive, robotics and pro-Audio/Visual applications. It offers twice the core performance of its predecessor and boasts 10.3Gbps transceiver I/O support and IEEE 754 hard floating point Digital Signal Processing (DSP) with rates up to 134GFLOPs. It also supports DDR3/L EMIF and OpenCL.
Cyclone 10 GX Product line:
Product Line | 10CX085 | 10CX105 | 10CX150 | 10CX220 |
---|---|---|---|---|
KLEs | 85 | 104 | 150 | 220 |
Memory Blocks (20K) | 291 | 382 | 475 | 587 |
Memory Block (Kb) | 5,820 | 7,640 | 9,500 | 11,740 |
Distributed memory (Kb) | 653 | 799 | 1,152 | 1,690 |
Hardened single-precision floating-point multipliers/adders | 84 | 125 | 156 | 192 |
Global clock networks | 32 | 32 | 32 | 32 |
Regional clocks | 8 | 8 | 8 | 8 |
18 x 19 multipliers | 168 | 250 | 312 | 384 |
Hard Memory Controllers (DDR3/L, LPDDR3) | 1 | 2 | 2 | 2 |
Maximum LVDS channels (1.434 Gbps) | 72 | 118 | 118 | 118 |
Maximum user I/O pins | 192 | 284 | 284 | 284 |
Maximum 3 V I/O | 48 | 48 | 48 | 48 |
Transceiver count (10.3 Gbps) | 4 | 12 | 12 | 12 |
PCI Express* (PCIe*) hardened IP blocks (up to Gen2 x4) | 1 | 1 | 1 | 1 |
The Intel Cyclone 10 LP on the other hand is well suited for low-power critical applications and boasts up to 50% less static power than the previous generation. It will find use in systems that use FPGA densities that have less than 75K logic elements and chip-to-chip bridging functions between electronic components or I/O expansion for microprocessors. Typical use includes sensor fusion, interfacing, bridging and I/O expansion.
The Cyclone 10 FPGA family will be available in 2H 2017, along with evaluation kits as well as the latest version of Quartus, the Intel FPGA programming software.
Cyclone 10 LP Product line:
Product Line | 10CL006 | 10CL010 | 10CL016 | 10CL025 | 10CL040 | 10CL055 | 10CL080 | 10CL120 |
---|---|---|---|---|---|---|---|---|
KLE | 6 | 10 | 16 | 25 | 40 | 55 | 80 | 120 |
Memory Blocks (9K) | 30 | 46 | 56 | 66 | 126 | 260 | 305 | 432 |
Memory Block (Kb) | 270 | 414 | 504 | 594 | 1,134 | 2,340 | 2,745 | 3,888 |
18 x 18 multipliers | 15 | 23 | 56 | 66 | 126 | 156 | 244 | 288 |
Phase-locked loop (PLL) | 2 | 2 | 4 | 4 | 4 | 4 | 4 | 4 |
Global clock networks | 10 | 10 | 20 | 20 | 20 | 20 | 20 | 20 |
LVDS channels | 65 | 65 | 137 | 124 | 124 | 132 | 178 | 230 |